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MC1066 ACPI-Compliant SMBus Temperature Sensor with Internal and External Diode Input
The MC1066 is a serially programmable temperature sensor optimized for monitoring modern high performance CPUs with http://onsemi.com on-board integrated temperature sensing diodes. Temperature data is converted from the CPU's diode outputs and made available as an 8-bit digital word. Communication with the MC1066 is accomplished via the standard System Management Bus (SMBus) commonly used in modern computer systems. This permits reading the current internal/external temperature, programming the threshold setpoints, and configuring 16-Pin QSOP the device. Additionally, an interrupt is generated on the DB SUFFIX CASE TBD ALERT/COMP pin when temperature moves outside the preset PRELIMINARY INFORMATION threshold windows in either direction. A separate CRITICAL setpoint is provided through external hardwiring for "fail safe" operation per ACPI guidelines. PIN CONFIGURATION A Standby command may be sent via the SMBus or by signaling the (Top View) STBY input pin to activate the low-power Standby mode. Registers can be accessed while in Standby mode. Address selection inputs CRIT1 1 16 NC allow up to nine MC1066s to share the same 2-wire SMBus for VDD 2 15 STBY multi-zone monitoring. D+ 3 14 SCL All registers can be read by the host, and both polled and interrupt D- 4 13 INT_SEL driven systems are easily accommodated. Small size, low installed CRIT0 5 MC1066 12 SDA cost, and ease of use make the MC1066 an ideal choice for ADD1 6 11 ALERT/COMP implementing sophisticated system management schemes, such as GND 7 ACPI. 10 ADD0 Features GND 8 9 OS * Specifically ACPI-Compliant * Backward Compliant to Older APM Systems * Includes Internal and External Sensing Capability * Outputs Temperature As 8-Bit Digital Word * Solid State Temperature Sensing; 1C Resolution * 3.0 -- 5.5V Operating Range ORDERING INFORMATION * Independent Internal and External Threshold Set-Points With Device Package Shipping ALERT/COMP Interrupt Output * SMBus 2-Wire Serial Interface MC1066DBR2 16-Pin QSOP 2500 Tape/Reel * Optional CRITICAL Set-Point for Full ACPI Compliant Implementation * Up To Nine MC1066s May Share the Same Bus * Low Standby Power Mode * Low Power: 70 A (max) Operating, 10 A (max) Standby Mode * 16-Pin Plastic QSOP Package Typical Applications * Thermal Protection For Intel "Deschutes" PentiumTM II and Other High Performance CPUs with Integrated On-Board Diode - No Sensor Mounting Problems! * Accurate Temperature Sensing From Any Silicon Junction Diode * Thermal Management in Electronic Systems: Computers, Network Equipment, Power Supplies
(c) Semiconductor Components Industries, LLC, 1999
1
February, 2000 - Rev. 0
Publication Order Number: MC1066/D
MC1066
FUNCTIONAL BLOCK DIAGRAM
Internal Sensor (Diode) D+ D-
DS
Modulator Register Set Int. Temp Ext.Temp Status Byte Config. Byte Conv. Rate Ext. Hi Limit Ext. Lo Limit Int. Hi Limit Int. Lo Limit CRIT. Limit
Control Logic
CRIT 0 CRIT 1 INT_SEL OS ALERT/ COMP STBY
SCL SDA SMBus Interface ADD 0 ADD 1
PIN DESCRIPTION
Pin No. 2 3 4 Symbol VDD D+ D- Type Power Power Supply Input Description
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Bi-Directional Bi-Directional Input Current Source and A/D Positive Input Current Sink and A/D Negative Input 6, 10 7, 8 11 ADD[1:0] GND Address Select Pins (See Address Decode Table) System Ground Power ALERT/COMP SDA SCL Output SMBus Interrupt (SMBALERT) or Comparator Output SMBus Serial Data 12 14 15 Bi-Directional Input Input Input SMBus Serial Clock Standby Enable STBY 1, 5 9 CRIT[1:0] OS CRITICAL Setpoint Bits (See CRITICAL Setpoint Decode Table) Open Collector, Low-True "Over-Temperature" Warning Output Selects ALERT or COMP Output on Pin 11 Not Connected Output Input -- 13 16 INT_SEL NC
PIN DESCRIPTION
SCL
Input. SMBus serial clock. Clocks data into and out of the MC1066.
SDA
the address specified in the serial bit stream must be made to initiate communication. Many SMBus-compatible devices with other addresses may share the same 2-wire bus. These pins are only active at power-on reset, and will latch into the appropriate states.
Bidirectional. Serial data is transferred on the SMBus in both directions using this pin.
ADD1, ADD0
ALERT/COMP*
Inputs. Sets the 7-bit SMBus address. These pins are "tri-state," and the SMBus addresses are specified in the Address Decode Table. (NOTE: The tri-state scheme allows up to nine MC1066s on a single bus. A match between the MC1066's address and
Output, Open Collector, Active Low. The ALERT output corresponds to the general SMBALERT signal and indicates an interrupt event. The MC1066 will respond to the standard SMBus Alert Response Address when ALERT is asserted. Normally, the ALERT output will be asserted and latched when any of the following occurs:
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1. INT_TEMP equal to or exceeds INT_HLIM 2. INT_TEMP below INT_LLIM 3. EXT_TEMP equal to or exceeds EXT_HLIM 4. EXT_TEMP below EXT_LLIM 5. External Diode "Open" The operation of the ALERT output is controlled by the MASK1 bit in the CONFIG register. If the MASK1 bit is set to "1," no interrupts will be generated on ALERT. The ALERT output is cleared and re-armed by the Alert Response Address (ARA). This output may be WIRE-ORed with similar outputs from other SMBus devices. If the alarm condition persists after the ARA, the ALERT output will be immediately re-asserted. (NOTE: A pull-up resistor is necessary on ALERT since it is an open-drain output. Current sourced from the pull-up resistor causes power dissipation and may cause internal heating of the MC1066. To avoid affecting the accuracy of internal temperature readings, the pull-up resistors should be made as large as possible.) Normally the COMP output will be asserted upon the following events: 1. EXT_TEMP equal to or exceeds EXT_HLIM 2. External Diode "Open" COMP will be de-asserted upon the following event: EXT_TEMP below EXT_HLIM. The operation of the COMP output is controlled by the MASK1 bit in the CONFIG register. If the MASK1 bit is set to "1," no interrupts will be generated on COMP. This output may be WIRE-ORed with similar outputs from other SMBus devices. Note: A pull-up resistor is necessary on COMP since it is an open-drain output. Current sourced from thepull-up resistor causes power dissipation and may cause internal heating of the MC1066. To avoid affecting the accuracy of internal temperature readings, the pull-up resistors should be made as large as possible.
INT_SEL STBY
Input. The activation of Standby mode may be achieved using either the STBY pin or the CHIP STOP bit (CONFIG register). If STBY is pulled low, the MC1066 unconditionally enters its low-power Standby mode (IDD = 10 A, max). The temperature-to-digital conversion process is halted, but ALERT and OS remain functional. The MC1066's bus interface remains active, and all registers may be read from and written to normally. The INT_TEMP and EXT_TEMP registers will contain whatever data was valid at the time of Standby. (Transitions on SDA or SCL due to external bus activity may increase the Standby power consumption.)
CRIT [1:0]
Inputs. These digital pins determine the temperature threshold for the CRITICAL setpoint when the 1066 is first powered up. They must be tied either to Ground or to VDD, or they must be left floating. See the CRITICAL setpoint decode table for details.
OS
Output. Open Collector, low-true digital output which asserts when either INT_TEMP or EXT_TEMP trips the CRITICAL setpoint. This interrupt cannot be masked.
D+
Bi-directional. This pin connects to the anode of the external diode and is the positive A/D input. Current is injected into the external diode from the MC1066, and the temperature proportional VBE is measured and converted to digital temperature data.
D--
Bi-directional. This pin connects to the cathode of the external diode. Current is sunk from the external diode into the MC1066 through this pin. It also is the negative input terminal to the MC1066's A/D converter. This node is kept at approximately 0.7V above GROUND.
VDD
Input. The operation of Pin 11 is defined by the state of this pin. There is an internal pull-up to VDD. If INT_SEL is high, Pin 11 will function as ALERT. If INT_SEL is grounded, Pin 11 will function as COMP.
Input. Power supply input. See electrical specifications.
GND
Input. Ground return for all MC1066 functions.
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ABSOLUTE MAXIMUM RATINGS*
Symbol VDD Power Supply Voltage Voltage on Any Pin (GND to VDD) TA Tstg Operating Temperature Range Storage Temperature Range SMBus Input/Output Current D- Input Current PD Maximum Power Dissipation Parameter Value 6.0 (GND - 0.3 V) to (VDD + 0.3 V) -55 to +125 -65 to +150 -1 to +50 1 330 Unit V V C C mA mA mW
* Maximum Ratings are those values beyond which damage to the device may occur. DC ELECTRICAL CHARACTERISTICS (VDD = 3.3 V, -55C TA 125C, unless otherwise noted.) Symbol Power Supply VDD VUV-LOCK VPOR IDD IDD IDD-STANDBY IDD-STANDBY ICRIT-BIAS IADD-BIAS Power Supply Voltage VDD Undervoltage Lockout Threshold Power-On Reset Threshold (VDD Falling Edge) Operating Current 0.25 Conv./Sec Rate SMBus Inactive (1) Operating Current 2 Conv./Sec Rate SMBus Inactive (1) Standby Supply Current (SMBus Active) Standby Supply Current (SMBus Inactive) CRIT[1:0] Bias Current (Power-Up Only) ADD[1:0] Bias Current (Power-Up Only) 3.0 2.4 1.0 -- -- -- -- -- -- -- 2.80 1.7 -- -- -- -- 160 160 5.5 2.95 2.3 70 180 100 10 -- -- V V V Characteristic Min Typ Max Unit
mA mA mA mA mA mA
V
ALERT/COMP Output VOL OS Output VOL Output Low Voltage IOL = 1.0 mA (3) V -- -- 0.4 Output Low Voltage IOL = 1.0 mA (3) -- -- 0.4
ADD[1:0], CRIT [1:0] Inputs VIL VIH STBY Input VIL VIH INT_SEL VIL VIH RP Logic Input Low Logic Input High Internal Pull-Up Resistance -- VDD x 0.7 -- -- -- 500 VDD x 0.3 -- -- V V kW C C -2 -3 -- -- -- 3 +2 +3 -- Logic Input Low Logic Input High -- VDD x 0.7 -- -- VDD x 0.3 -- V V Logic Input Low Logic Input High -- VDD x 0.7 -- -- VDD x 0.3 -- V V
Temp-to-Bits Converter TRES TIERR Basic Temperature Resolution Internal Diode Temperature +60C TA +100C 0C TA +125C -55C TA 0C -- 1 --
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MC1066
Symbol Temp-to-Bits Converter TEERR External Diode Temperature +60C TA +100C 0C TA +125C -55C TA 0C External Diode High Source Current (D+) - (D-) ~ 0.65 V External Diode Low Source Current (D+) - (D-) ~ 0.65 V D- Source Voltage Conversion Time From CHIP STOP to Conv. Complete (2) Conversion Rate Accuracy (See Conversion Rate Register Desc.) C -3 -5 -- -- -- -- 54 -35 -- -- 5 100 10 0.7 83 -- +3 +5 -- -- -- -- 112 +35 Characteristic Min Typ Max Unit
IDIODE-HIGH IDIODE-LOW VD-SOURCE tCONV
mA mA
V msec %
DCR
2-Wire SMBus Interface VIH VIL VOL Logic Input High Logic Input Low SDA Output Low IOL = 2 mA (3) IOL = 4 mA (3) Input Capacitance SDA, SCL 2.2 -- -- -- -- -- -- -- -- 5 -- 0.8 0.4 0.6 -- pF V V V
CIN
ILEAK I/O Leakage -1 0.1 1 mA 1. Operating current is an average value (including external diode injection pulse current) integrated over multiple conversion cycles. Transient current may exceed this specification. 2. For true recurring conversion time see Conversion Rate register description. 3. Output current should be minimized for best temperature accuracy. Power dissipation within the MC1066 will cause self-heating and temperature drift error.
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MC1066
SMBus PORT AC TIMING (VDD = 3.3 V, -55C (TA = TJ) 125C; CL = 80 pF, unless otherwise noted.) Symbol fSMB tLOW tHIGH tR tF tSU(START) tH(START) tSU-DATA tH-DATA tSU(STOP) tIDLE Characteristic SMBus Clock Frequency Low Clock Period (10% to 10%) High Clock Period (90% to 90%) SMBus Rise Time (10% to 90%) SMBus Fall Time (90% to 10%) Start Condition Setup Time (90% SCL to 10% SDA) (for Repeated Start Condition) Start Condition Hold Time Data in Setup Time Data in Hold Time Stop Condition Setup Time Bus Free Time Prior to New Transition Min 10 4.7 4 -- -- 4 4 1,000 1,250 4 4.7 Typ -- -- -- -- -- -- -- -- -- -- -- Max 100 -- -- 1,000 300 -- -- -- -- -- -- Unit kHz
msec msec
nsec nsec
msec msec
nsec nsec
msec msec
SMBUS Write Timing Diagram
A
ILOW
B
IHIGH
C
D
EF
G
H
I
J
K
L
M
SCL
SDA
t SU(START) t H(START) t SU-DATA t H-DATA t SU(STOP) t IDLE
A = Start Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Slave H = LSB of Data Clocked into Slave I = Slave Pulls SDA Line Low
J = Acknowledge Clocked into Master K = Acknowledge Clock Pulse L = Stop Condition, Data Executed by Slave M= New Start Condition
SMBUS Read Timing Diagram
A
ILOW
B
IHIGH
C
D
EF
G
H
I
J
K
SCL
SDA
t SU(START) t H(START) t SU-DATA t SU(STOP) t IDLE
A = Start Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Master H = LSB of Data Clocked into Master
I = Acknowledge Clock Pulse J = Stop Condition K = New Start Condition
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MC1066
DETAILED OPERATING DESCRIPTION The MC1066 acquires and converts temperature information from two separate sources, both silicon junction diodes, with a basic accuracy of 1C. One is located on the MC1066 die; the other is connected externally. This external diode may be located on another IC die. The analog-to-digital converter on the MC1066 alternately converts temperature data from the two sensors and stores them separately in internal registers.
EXT_TEMP INT_TEMP ASSERT OS RELEASE OS
CRITICAL
TEMPERATURE
ASSERT ALERT ASSERT ALERT
EXT_HLIM
ASSERT ALERT INT_HLIM
EXT_LLIM
The system interface is a slave SMBus port with an ALERT (SMBALERT) and COMP interrupt outputs. The ALERT interrupt is triggered when one or more of four preset temperature thresholds are tripped (see Figure 1). These four thresholds are user-programmable via the SMBus port. The COMP interrupt is triggered when EXT_TEMP equals or exceeds EXT_HLIM. Also, there is a fifth independent, hardware programmable threshold (CRITICAL) that trips its own interrupt (OS) for an unconditional warning. Additionally, the temperature data can be read at any time through the SMBus port. Nine SMBus addresses are programmable for the MC1066, which allows for a multi-sensor configuration. Also, there is low-power Standby mode where temperature acquisition is suspended.
SETPOINTS
ASSERT ALERT
INT_LLIM
TIME
ALERT COMP OS
Note: This diagram implies that the appropriate setpoint is moved, temporarily, after each ALERT event to suppress re-assertion of ALERT immediately after the ARA/de-assertion.
Figure 1. Temperature vs. Setpoint Event Generation
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MC1066
POR*, initialize all registers Monitor SMBus for START condition
STBY mode active? NO Start internal conversion STATUS [D7]
YES
Stop conv., reset STATUS D[7] YES
One shot? NO NO YES STBY released?
YES STATUS read? NO
Execute Status read and clear STATUS Execute SMBus read Execute SMBus write
STBY active? NO NO EOC*? YES Rest period over? NO
YES
READ Perform one conversion cycle YES Update INT_TEMP NO Address match? YES NO Read/ Write
WRITE
YES Valid command? NO ARA*?
Start external conversion
NO
Thermal Trip? YES
YES STBY active? NO YES Ext. diode open? NO NO YES One Shot? NO Rest Period according to CONV_RATE register YES Update EXT_TEMP CONFIG [D7] active? YES Thermal Trip? NO Reset STATUS bit D[7] Set appropriate STATUS bit D[6:2] Enable ALERT Disable COMP YES NO EXT_LLIM Trip? YES NO YES NO YES ALERT active? YES ARA* bus arbitration? NO Win arbitration? YES Software Trip? YES Disable and re-arm ALERT, send local address to host Enable COMP
Hardware Trip?
NO Enable OS#
EOC*? NO
EXT_HLIM Trip? NO
YES
* POR = Power On Reset; ARA = Alert Response Address; EOC = End Of Conversion
Figure 2. MC1066 Functional Description Flowchart
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MC1066
STANDBY MODE The MC1066 allows the host to put it into a low power (IDD = 10 A, max) Standby mode. In this mode, the A/D converter is halted, and the temperature data registers are frozen. The SMBus port operates normally. Standby mode can be enabled with either the STBY input pin or the CHIP STOP bit in the CONFIG register. The following table summarizes this operation.
Standby Mode Operation STBY 0 1 1 1 Chip Stop Bit Don't Care 0 1 1 One Shot? Don't Care Don't Care No Yes Operating Mode Standby Normal Standby Normal (1 Conversion Only, then Standby) Slave Start
Read/Write selection bit. Each access must be terminated by a Stop Condition (STOP). A convention called Acknowledge (ACK) confirms receipt of each byte. Note that SDA can change only during periods when SCL is LOW (SDA changes while SCL is High are reserved for Start and Stop conditions.)
MC1066 Serial Bus Conventions Term Explanation Transmitter The device sending data to the bus. Receiver Master The device receiving data from the bus. The device which controls the bus: initiating transfers (START), generating the clock, and terminating transfers (STOP). The device addressed by the master. A unique condition signaling the beginning of a transfer indicated by SDA falling (High -- Low) while SCL is high. A unique condition signaling the end of a transfer indicated by SDA rising (Low -- High) while SCL is high. A receiver acknowledges the receipt of each byte with this unique condition. The receiver drives SDA low during SCL high of the ACK clock-pulse. The Master provides the clock pulse for the ACK cycle. Communication is not possible because the bus is in use. When the bus is idle, both SDA and SCL will remain high. The state of SDA must remain stable during the High period of SCL in order for a data bit to be considered valid. SDA only changes state while SCL is low during normal data transfers (see Start and Stop conditions).
SMBus SLAVE ADDRESS
Stop
The two pins ADD1 and ADD0 are tri-state input pins which determine the 7-bit SMBus slave address of the MC1066. The address is latched during POR. The allowable addresses are summarized in the table below.
Address Decode Table ADD0 0 0 0 open (3-state) open (3-state) open (3-state) 1 1 1 ADD1 0 open (3-state) 1 0 open (3-state) 1 0 open (3-state) 1 SMBus Address 0011 000 0011 001 0011 010 0101 001 0101 010 0101 011 1001 100 1001 101 1001 110
ACK
Busy NOT Busy Data Valid
Start Condition (START)
SERIAL PORT OPERATION The Serial Clock input (SCL) and bi-directional data port (SDA) form a 2-wire bi-directional serial port for programming and interrogating the MC1066. The following conventions are used in the bus architecture in the followingtable. (See SMBus Write/Read Timing Diagram.) All transfers take place under control of a host, usually a CPU or microcontroller, acting as the Master, which provides the clock signal for all transfers. The MC1066 always operates as a slave. The serial protocol is illustrated in Figure 3. All data transfers have two phases; all bytes are transferred MSB first. Accesses are initiated by a start condition (START), followed by a device address byte and one or more data bytes. The device address byte includes a
The MC1066 continuously monitors the SDA and SCL lines for a start condition (a High to Low transition of SDA while SCL is High), and will not respond until this condition is met. (See SMBus Write/Read Timing Diagram.)
Address Byte
Immediately following the Start Condition, the host must transmit the address byte to the MC1066. The states of ADD1 and ADD0 during power-up determine the 7-bit SMBus address for the MC1066. The 7-bit address transmitted in the serial bit stream must match for the MC1066 to respond with an Acknowledge (indicating the MC1066 is on the bus and ready to accept data). The eighth bit in the Address Byte is a Read-Write Bit. This bit is 1 for a read operation or 0 for a write operation.
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Write Byte Format S ADDRESS 7 Bits Slave Address Read Byte Format S ADDRESS 7 Bits Slave Address WR ACK COMMAND 8 Bits ACK S ADDRESS RD 7 Bits ACK DATA 8 Bits NACK P WR ACK COMMAND 8 Bits ACK DATA 8 Bits ACK P
Command Byte: selects which register you writing to.
Data Byte: data goes into the register set by the command byte.
Command Byte: selects which register you reading from.
Slave Address: repeated due to change in data- flow direction. Receive Byte Format
Data Byte: reads from the register set by the command byte.
Send Byte Format S ADDRESS 7 Bits WR ACK COMMAND 8 Bits ACK P
S
ADDRESS RD 7 Bits
ACK
DATA 8 Bits
NACK
P
Command Byte: sends command with no data, usually used for one-shot command. S = Start Condition P = Stop Condition Shaded = Slave Transmission
Data Byte: reads data from the register commanded by the last Read Byte.
Figure 3. SMBus Protocols Command Byte Description
Command RIT RET RS RC RCR RIHL RILL REHL RELL WC WCR WIHL WILL WEHL WELL OSHT RMID RMREV Code 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh FEh FFh Function Read Internal Temp (INT_TEMP) Read External Temp (EXT_TEMP) Read Status Byte (STATUS) Read Configuration Byte (CONFIG) Read Conversion Rate Byte (CONV_RATE) Read Internal High Limit (INT_HLIM) Read Internal Low Limit (INT_LLIM) Read External High Limit (EXT_HLIM) Read External Low Limit (EXT_LLIM) Write Configuration Byte (CONFIG) Write Conversion Rate Byt3 (CONV_RATE) Write Internal High Limit (INT_HLIM) Write Internal Low Limit (INT_LLIM) Write External High Limit (EXT_HLIM) Write External Low Limit (EXT_LLIM) One Shot Temp Measurement Read Manufacturer ID (MFR_ID) Read Manufacturer Revision Number (MFR_REV)
Acknowledge (ACK)
Acknowledge (ACK) provides a positive handshake between the host and the MC1066. The host releases SDA after transmitting eight bits, then generates a ninth clock cycle to allow the MC1066 to pull the SDA line Low to acknowledge that it successfully received the previous eight bits of data or address.
Data Byte
After a successful ACK of the address byte, the host must transmit the data byte to be written or clock out the data to be read. (See the appropriate timing diagrams.) ACK will be generated after a successful write of a data byte into the MC1066.
Stop Condition (STOP)
Communications must be terminated by a stop condition (a Low to High transition of SDA while SCL is High). The Stop Condition must be communicated by the transmitter to the MC1066. (See SMBus Write/Read Timing Diagram.)
NOTE: Proper device operation is NOT guaranteed if undefined locations (10h to FDh) are addressed. In case of erroneous SMBus operation (RECEIVE_BYTE command issued immediately after WRITE_BYTE command) the MC1066 will ACKnowledge the address and return 1111 1111b to signify an error. Under no condition will it implement an SMBus "timeout."
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MC1066
REGISTER SET AND PROGRAMMER'S MODEL
MC1066 Command Set
The MC1066 supports four SMBus command protocols. These are READ_BYTE, WRITE_BYTE, SEND_BYTE, and RECEIVE_BYTE. See System Management Bus Specification Rev. 1.0 for details. Configuration Register (Config), 8-Bits, Read/Write
Configuration Register (Config)
D[7] Mask1 Bit D[7] D[6] Chip Stop D[5] D[4] D[3] D[2] D[1] D[0] Reserved Function Interrupt Mask (see text) Standby switch Reserved -- Always returns zero when read. Operation 1 = mask ALERT/ COMP 0 = don't mask ALERT/COMP 1 = standby, 0 = normal N/A
Temperature Registers, 8-Bits, Read-Only (INT_TEMP, EXT_TEMP) The binary value (2's complement format) in these two registers represents temperature of the internal and external sensors following a conversion cycle. The registers are automatically updated in an alternating manner.
Internal Temperature Register (INT_TEMP)
D[7] MSB D[6] x D[5] x D[4] x D[3] x D[2] x D[1] x D[0] LSB
External Temperature Register (EXT_TEMP)
D[7] MSB D[6] x D[5] x D[4] x D[3] x D[2] x D[1] x D[0] LSB
POR State 0
D[6] D[5]--D[0]
0 0
Temperature Threshold Setpoint Registers, 8-Bits, Read-Write (INT_HLIM, INT_LLIM, EXT_HLIM, EXT_LLIM) These registers store the values of the upper and lower temperature setpoints for event detection. The value is in 2's-complement binary. INT_HLIM and INT_LLIM are compared with the INT_TEMP value, and EXT_HLIM and EXT_LLIM are compared with EXT_TEMP. These registers may be written at any time.
Internal High Limit Setpoint Register (INT_HLIM)
D[7] MSB D[6] x D[5] x D[4] x D[3] x D[2] x D[1] x D[0] LSB
A/D Conversion Rate Register (CONV_RATE), 8-Bits, Read/Write
A/D Conversion Rate Register (CONV_RATE)
D[7] D[6] D[5] Reserved Bit D[7:3] POR State 0 Function Reserved -- Always returns zero when read. Conversion rate bits. D[4] D[3] D[2] MSB D[1] X D[0] LSB
Internal Low Limit Setpoint Register (INT_LLIM)
D[7] MSB D[6] x D[5] x D[4] x D[3] x D[2] x D[1] x D[0] LS
Operation N/A
External High Limit Setpoint Register (EXT_HLIM)
D[7] MSB D[6] x D[5] x D[4] x D[3] x D[2] x D[1] x D[0] LSB
D[2:0]
010b
See below.
External Low Limit Setpoint Register (EXT_LLIM)
D[7] MSB D[6] x D[5] x D[4] x D[3] x 01111111b 11001001b 01111111b 11001001b D[2] x D[1] x +127C --55C +127C --55C D[0] LSB
A/D Conversion Rate Selection
D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 Conversion Rate Samples/sec 0.0625 0.125 0.25 0.5 1.0 2.0 4.0 8.0
NOTE: POR states: INT_HLIM INT_LLIM EXT_HLIM EXT_LLIM
NOTE: Conversion rate denotes actual sampling of both internal and external sensors.
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Critical Setpoint Register, 8-Bits (Reserved) This register stores the value of the CRITICAL setpoint. It is not accessible through the SMBus port and only can be set with the CRIT[1:0] pins. The value in this register determines the OS event threshold.
Critical Limit Setpoint Register (Critical)
D[7] MSB D[6] x D[5] x D[4] x D[3] x D[2] x D[1] x D[0] LSB D[7] D[6] Critical SetpointC 85 90 95 100 105 110 115 120 125 D[2] D[1:0] 0 0 D[3] 0 D[5] D[4] 0 0
Status Register (Status)
D[7] Busy D[6] Flag1 D[5] Flag2 D[4] Flag3 D[3] Flag4 D[2] Flag5 D[1] Flag6 D[0] Reserved
Bit(s)
POR State 0 0
Function Signal A/D converter is busy. Interrupt flag for INT_HLIM event Interrupt flag for INT_LLIM event Interrupt flag for EXT_HLIM event Interrupt flag for EXT_LLIM event External diode "fault" flag Reserved -- Always returns zero.
Operation* 1 = A/D busy, 0 = A/D idle 1 = interrupt occurred, 0 = none 1 = interrupt occurred, 0 = none 1 = interrupt occurred, 0 = none 1 = interrupt occurred, 0 = none 1 = external diode fault 0 = external diode OK N/A
Critical Setpoint Decode Table
CRIT1 0 0 0 open open open 1 1 1 CRIT0 0 open 1 0 open 1 0 open 1 Binary 01010101 01011010 01011111 01100100 01101001 01101110 01110011 01111000 01111101
In the two temperature data and four threshold setpoint registers, each unit value represents one degree (Celsius). The value is in 2's-complement binary format such that a reading of 00000000b corresponds to 0C. Examples of this temperature-to-binary value relationship are shown in the following table.
Temperature-to-Digital Value Conversion (INT_TEMP, EXT_TEMP, INT_HLIM, INT_LLIM,EXT_HLIM, EXT_LLIM)
Actual Temperature +130.00C +127.00C +126.50C +25.25C +0.50C +0.25C 0.00C --0.25C --0.50C --0.75C --1.00C --25.00C --25.25C --54.75C --55.00C --65.00C Rounded Temperature +127C +127C +127C +25C +1C 0C 0C 0C 0C --1C --1C --25C --25C --55C --55C --65C Binary Value 01111111 01111111 01111111 00011001 00000001 00000000 00000000 00000000 00000000 11111111 11111111 11100111 11100110 11001001 11001001 10111111 Hex Value 7F 7F 7F 19 01 00 00 00 00 FF FF E7 E7 C9 C9 BF
NOTE: All status bits are cleared after a read operation is performed on STATUS. The EXT_TEMP register will read +127C if an external diode "open" is detected.
Manufacturer's Identification Register (MFR_ID), 8-Bits, Read Only:
Manufacturer's Identification Register (MFR_ID)
D[7] MSB D[6] X D[5] X D[4] X D[3] X D[2] X D[1] X D[0] LSB
Manufacturer's Revision Register (MFR_REV), 8-Bits, Read Only:
Manufacturer's Revision Register (MFR_REV)
D[7] MSB D[6] X D[5] X D[4] X D[3] X D[2] X D[1] X D[0] LSB
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MC1066
Register Set Summary: The MC1066's register set is summarized in the following table. All registers are 8-bits wide.
Name INT_TEMP EXT_TEMP STATUS CONFIG CONV_RATE INT_HLIM INT_LLIM EXT_HLIM EXT_LLIM MFR_ID MFR_REV CRITICAL Description Internal sensor temperature (2's complement) External sensor temperature (2's complement) STATUS register CONFIG register A/D conversion rate register Internal high limit (2's complement) Internal low limit (2's complement) External high limit (2's complement) External low limit (2's complement) ASCII for letter "T" (TelCom) Serial device revision # CRITICAL limit (2's complement) POR State 0000 0000b* 0000 0000b* 0000 0000b 0000 0000b 0000 0010b 0111 1111b 1100 1001b 0111 1111b 1100 1001b 0101 0100b ** N/A Read *** Write
*NOTE: The INT_TEMP and EXT_TEMP register immediately will be updated by the A/D converter after POR. If STBY is low at power-up, INT_TEMP and EXT_TEMP will remain in POR state (0000 0000b). **MFR_REV will sequence 01h, 02h, 03h, etc. by mask changes. ***CRITICAL only can be written via the CRIT[1:0] pins. It cannot be accessed through the SMBus port.
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MC1066
PACKAGE DIMENSIONS
16-Pin QSOP PLASTIC PACKAGE CASE TBD ISSUE TBD
PIN 1
.157 (3.99) .244 (6.20) .150 (3.81) .228 (5.80)
.197 (4.98) .189 (4.80)
.010 (0.25) .004 (0.10) .069 (1.75) .053 (1.35)
8 MAX. .050 (1.27) .016 (0.41)
.010 (0.25) .007 (0.19)
.025 (0.635) TYP.
.012 (0.31) .008 (0.21)
Dimensions: inches (mm)
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MC1066
Notes
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MC1066
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MC1066/D

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